搜索资源列表
spi_Master
- 实现了对SD卡的SPI方式下读写操作，已经测试了，可以直接用-The realization of the SD card to read and write SPI operation mode has been tested, can be directly used
spi_slave
- spi slave 8bit address 1bit r/w 7bit number data
spi.tar
- This is a verilog code used oversampled clock to implement SPI slave. Also include C code for a ARM processor as the SPI master-This is a verilog code used oversampled clock to implement SPI slave
spi_op_core
- spi controller SPI IP core
spi_master
- SPI wishbone master and verification environment
spi_core_open
- SPI 设计 为主机设计，供大家参考,希望对大家有用-SPI master design
led
- 与串口通讯控制led（使用VHDL硬件描述语言，通过Altera QuartusII 开发）-Serial control and communications led (the use of VHDL hardware descr iption language, through the development of Altera QuartusII)
SPI_vrilog
- SPI接口源码,语言vrilog,包括MASTER和SLAVE-SPI interf for vrilog.
spi
- send SPI data that is writen as FSM-send SPI data that is writen as FSM
SPI
- SPI（Serial Peripheral Interface）是一种串行同步通讯协议，由一个主设备和一个或多个从设备组成，主设备启动一个与从设备的同步通讯，从而完成数据的交换。SPI 接口由SDI（串行数据输入），SDO（串行数据输出），SCK（串行移位时钟），CS（从使能信号）四种信号构成，CS 决定了唯一的与主设备通信的从设备，如没有CS 信号，则只能存在一个从设备，主设备通过产生移位时钟来发起通讯。通讯时，数据由SDO 输出，SDI 输入，数据在时钟的上升或下降沿由SDO 输出，在紧接着
spi_master_phy
- 这是spi接口传输的一部分内容，本源码一共三部分，功能：spi接口的的实现即对外设的读写数据-This is the spi interface transfer part of the contents of a total of three parts of this source, function: spi interface that the realization of the read and write data to the peripheral
spi_master
- SPI接口的实现以及对外设的读写操作，其中包扩了几种工作方式，同时可以读取外设的版本号，传输速率可以达到2Mbps-SPI interface implementation, as well as read and write operations on the peripheral, which extended several work packages at the same time can read the version number of peripherals, transfer
spi_verilog
- 实现SPI MASTER功能，并有仿真代码和仿真结果。-To achieve SPI MASTER function, and a simulation code and simulation results.
spi_tx
- 关于串口通讯(SPI)的VHDL源程序,可以在通用串口通讯中-On the serial communication (SPI) of the VHDL source code, can be general-purpose serial communication
conjoined
- SPI protocol: Serial Periphral Interface with both slave and master incorporated-SPI protocol: Serial Periphral Interface with both slave and master incorporated
spi
- vhdl spi pin configuration
spi.asm
- vhdl spi port configuration
spi.sim
- vhdl spi cpld simulation
VHDLsample
- 英国诺森比亚大学的vhdl语言例程集锦，英文原版。 包含很多优秀的VHDL语言范例，可供学习。所有程序均可在符合IEEE标准的模拟器上模拟。-This file contains a selection of VHDL source files which serve to illustrate the diversity and power of the language when used to describe various types of hardware. The exampl
SPIVerilogHDL
- SPI协议Verilog HDL程序包用Verilog语言实现fpga模拟实现spi协议功能-fpga-spi-verilog